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Suggested addition concerning the encoding of instructions: Instructions are encoded in a prefix code, enabling the processor to decode a sequence of concatenated instructions in memory without any ambiguities. — Preceding unsigned comment added by 46.116.12.41 ( talk) 13:30, 16 November 2011 (UTC)
I have included a simple definition for mortals.
in the first sentence there's a link to instruction (computer science) that redirects to the article itself (an endless recursion if you will) - what's that supposed to be? I didn't wanna take that off before asking here. thnx! —Preceding unsigned comment added by 84.111.72.161 ( talk) 17:58, 8 March 2011 (UTC)
The lengthy assembly language article discusses basic instruction set elements that seem better placed here. This article, in contrast, goes into relatively great detail about ISA and engineering issues not of interest to the general reader. Basically, instruction set strikes me as a fundamental encyclopedic entry, one that should be accessible to the non-engineer. I suggest moving the deeper wires-and-pliers content into an ISA article, and into others (microprogramming, RISC,...). I think we should make this a more general/overview discussion of how CPUs work -- registers, interrupts, stacks, addressing modes, etc., preferably with some nice pictures. Much of what remains here should consist of overview statements with links to specific hardware topics. Comments? Trevor Hanson 21:13, 27 October 2006 (UTC)
0-operand ("zero address machines") -- these are also called stack machines, and all operations take place using the top one or two positions on the stack. Adding two numbers here can be done with four instructions: push a, push b, add, pop c;
Why is it called 0-operand even though a, b and c are operands? -- Abdull 12:19, 2 December 2006 (UTC)
Alas, while I find myself agreeing with HenkeB, I must point out that people talking about computer architecture often use "operand" very differently than people talking about math. An assembler creates the bit pattern for a full instruction by combining (typically) 2 groups of bits. One group (the "opcode") chooses the kind of operation the instruction does, and also decides the length and format of the other group of bits. The other group of bits in a full instruction are the "operands". Each operand is either a literal value, the "address" of a particular register, or a memory address. (The actual *values* in that register or at that memory location are not "operands" in this sense). The "zero-operand" machines have instructions that are all-opcode, no-operand. The TTA machines are the opposite extreme -- no bits of opcode, all the bits are in the operand.
I suspect the example "push a, push b, add, pop c;" may be unnecessarily confusing. It certainly appears to have 1 operand. I've seen a "zero-operand" machine that truly has no operands -- [ The Minimal CISC] -- but this is just a toy.
Perhaps a less-confusing example would be based on a serious "zero-operand" machine: "constant a, load, constant b, load, add, constant c, store". The "push address constant to stack" instruction is the only instruction that has one operand. All other instructions (including "load" and "store") have zero operands. -- 68.0.120.35 07:15, 4 October 2007 (UTC)
Hy, I'm looking for a "family tree" like the one for programing languages found here [2] Anyone have ever seen one? -- 84.56.183.114 09:15, 5 February 2007 (UTC)
Should SWEET16 be added? It was a useful software implemented ISA created by Steve Wozniak. -- 88.90.140.47 20:41, 13 February 2007 (UTC)
Most RISC Processors actually use Three operands. Read the paper by John Cocke Listed under the IBM 801 article to see why. 66.73.48.200 21:37, 6 July 2007 (UTC)Fingal
I think there's difference between "instruction set" and "instruction set architecture". So there's need to split. Callmejosh ( talk) 10:02, 28 August 2008 (UTC)
Would someone please give us a 2-sentence definition of "instruction set" and of "instruction set architecture", so the rest of us can see this difference? -- 68.0.124.33 ( talk) 03:51, 9 September 2008 (UTC)
Let me try-
instruction set:
instruction set architecture:
Thats more than 2 sentences, but being a kernel hacker I really want these to be two separate articles. —Preceding unsigned comment added by 70.89.148.13 ( talk) 15:29, 5 October 2008 (UTC)
This article lists IBM System/360 and S/370 as hardware implementations. Most models of the S/360 and S/370 were implemented with software in Read Only Storage (ROS) for the older models and Writable Control Store (WCS) for the newer models. The only hardware implementations were
All of these
and every S/370, 43xx and 30xx other than the 370/195 was microprogrammed. Shmuel (Seymour J.) Metz Username:Chatul ( talk) 19:07, 22 November 2010 (UTC)
There are a number of ways to improve code density; high code density does not imply that all of them were used. In particulary, high code density does not imply that there are special instructions for subroutine call and return, nor are such instructions part of the definition of CISC. Shmuel (Seymour J.) Metz Username:Chatul ( talk) 12:31, 19 September 2012 (UTC)
Surely someone other than Intel has written and published a slightly less product-specific discussion of the general concepts related to computer instruction sets? Better references are needed. -- Wtshymanski ( talk) 14:58, 9 October 2012 (UTC)
In addition to machines such as the UNIVAC 1108, with separate I-bank and E-bank within the same physical memory, the machines designed to simulate a common architecture, e.g, most S/360 models, had a read-only storage for Microcode with a different word size than that of the writable memory. I'm not sure how much detail belongs in the article on that point. Shmuel (Seymour J.) Metz Username:Chatul ( talk) 19:09, 18 January 2013 (UTC)
I see that the article for "Instruction (computer science)" was merged into this article in January 2011. I believe this was a mistake. Someone who is attempting to understand basic computer science needs to grasp the concept of a computer instruction before learning about sets of them or, shudder, being exposed to instruction set architecture in all its glory.
If you read the lead you will see there is no attempt at defining what an "instruction set" is a set of!
In general, we need to be able to link the word "instruction" to some text somewhere that defines that term and is understandable to such a person. I would prefer this be a separate article, but at the least this article should have a linkable section that clearly and simply defines what a computer instruction is (in traditional architecture).
In general I am of the school of Wikipedians that favors lots of concise articles on specific concepts over articles that try to cover a broad group of subjects, and that grow and grow and seem to gradually lose their coherence as they grow. (Not that this would apply to this article, mind you. :) )
So how can we solve this problem?
Tell me what you think. Thanks! Frappyjohn ( talk) 01:58, 1 March 2013 (UTC)
>>When some of the operands are given implicitly, the number of specified operands in an instruction is smaller than the arity of the operation. When a "destination operand" explicitly specifies the destination, the number of operand specifiers in an instruction is larger than the arity of the operation.<<
I understand the first sentence, but in the second sentence's case, shouldn't the number of operand specifiers be EQUAL as the arity? If not, why? SyP ( talk) 11:57, 18 April 2013 (UTC)
The Design section mentions "Zilog Z80 uses the eight codes ". That is true, but the opcodes were originally part of the hardware interrupt on the Intel 8080. Since the Z80 added support for a vector table, the opcodes could be used for other purposes - like a tiny subroutine call. (Which several Microsoft BASICs made use of.) Wmdgus73 ( talk) 04:11, 20 October 2013 (UTC)
What characterizes RISC is not the number of opcodes but their regularity and the simplicity of the operations. Specifically, in a RISC, instruction fetching, scheduling and execution take the same amount of time regardless of the opcode. Of course, cache misses and register conflicts can introduce delays, but those are a function of the execution profile rather than the individual opcode.
As an example, the IBM POWER microprocessors have a RISC architectue the IBM 7090 is a CISC, even though the 7090 has far fewer instructions. Shmuel (Seymour J.) Metz Username:Chatul ( talk) 17:46, 3 December 2013 (UTC)
The article says: "More complex operations are built up by combining these simple instructions, which (in a von Neumann architecture) are executed sequentially, or as otherwise directed by control flow instructions." Can someone explain how the sequential execution of instructions is related to the Von Neumann architecture? Couldn't the Harvard architecture execute the instructions one-by-one too? Maybe we should refactor this sentence... It's also unsourced. Sofia Koutsouveli ( talk) 15:58, 22 March 2014 (UTC)
See the discussion at talk:processor design#permission to use an instruction set.
I understand their coming to x86 ( AVX-512?), not sure if they should fall under "Complex instructions"-heading..
I just find them intriguing. No matter where they should be put, I think they should be included..
[Also not mainstream yet are instructions for complex numbers (can you think of other non-ordinary not included here?). Since can be broken down, I do not really expect them in RISCs; nor x86 really (e.g. in above). I'm aware of some designs for logaritmic number systems [for them], but I guess in no actually used chips? Complex numbers can be used for neural networks.. while often only real-valued used [or with such instructions..].] comp.arch ( talk) 15:33, 28 March 2017 (UTC)
The article's lead presently says:
An instruction set, with its instruction set architecture (ISA), is the interface between a computer's software and its hardware, and thereby enables the independent development of these two computing realms; it defines the valid instructions that a machine may execute.
It is the part of the computer architecture related to programming, including the native data types, instructions, registers, addressing modes, memory architecture, interrupt and exception handling, and external I/O. An ISA includes a specification of the set of opcodes (machine language), and the native commands implemented by a particular processor.
This has several problems:
This leads to the article's title. Given the history of the term "ISA" and that in some ISAs, an "instruction set" is a component of the ISA, it makes more sense that the article be titled "Instruction set architecture", since this title is capable of encompassing all possible definitions, whereas "Instruction set" cannot. 50504F ( talk) 06:50, 9 May 2017 (UTC)
One of the most important abstractions is the interface between the hardware and the lowest-level software. Because of its importance, it is given a special name: the instruction set architecture, or simply architecture, of a computer.
(Also called architecture). An abstract interface between the hardware and the lowest-level software that encompasses all the information necessary to write a machine language program that will run correctly, including instructions, registers, memory access, and so on.
To command a computer's hardware, you must speak its language. The words of a computer's language are called instructions, and its vocabulary is called an instruction set.
The vocabulary of commands understood by a given architecture.
Computer architecture describes the user's view of a computer. The instruction set, visible registers, memory management table structures and exception handling model are all part of the architecture.
Computer architecture refers to those attributes that have a direct impact on the logical execution of a program. ... Examples of architectural attributes include the instruction set...
An instruction set, or instruction set architecture (ISA)...
I've rewritten the the lead to fix the issues raised. It's much better than before, but given the broad scope and sophistication of the topic, I suspect that the lead is still imperfect. A review of the edits would be very helpful. 50504F ( talk) 05:42, 17 May 2017 (UTC)
The lead section (which I'm mostly responsible for), as of 29 May 2017, says:
An instruction set architecture (ISA) is an abstract model of a computer. It is also referred to as architecture or computer architecture. A realization of an ISA is called an implementation. An ISA permits multiple implementations that may vary in performance, physical size, and monetary cost (among other things); because the ISA serves as the interface between software and hardware. Software that has been written for an ISA can run on different implementations of the same ISA. This has enabled binary compatibility between different generations of computers to be easily achieved, and the development of computer families. Both of these developments have helped to lower the cost of computers and to increase their applicability. For these reasons, the ISA is one of the most important abstractions in computing today.
An ISA defines everything a machine language programmer needs to know in order to program a computer. What an ISA defines differs between ISAs; in general, ISAs define the supported data types, what state there is (such as the main memory and registers) and their semantics (such as the memory consistency and addressing modes), the instruction set (the set of machine instructions that comprises a computer's machine language), and the input/output model.
Reading the lead section leads to see two possible issues:
Feedback would be helpful. 50504F ( talk) 06:40, 29 May 2017 (UTC)
Here's my first pass at an improvement. It probably contains much detail that is already in the article body; I haven't checked. I haven't been careful about quote marks vs italics, or other details of wikimarkup, either.
The challenge that must be met by the lede here is that many of the terms used to describe the concept of "ISA" will, like "ISA", also be unfamiliar to the general reader, and we shouldn't depend on WLs for everything.
A computer's instruction set architecture (ISA) (also referred to as "instruction set", or less rigorously, "computer architecture" or simply "architecture") is a functional description of a computer's central processing unit (CPU). It is an "abstract model" of a computer's CPU, in that it only provides a functional description, with no requirements of how those functions are to be implemented.
The primary role of an ISA is to define the "machine language" in which programs for the computer are coded. This language is usually, in the architecture specification, described using binary, octal, or hexadecimal notation. For example, an instruction to "move" data from one place to the other might be coded in the computer's memory as D0 (hexadecimal). The ISA defines this coding and describes exactly what the processor will do when it encounters this instruction, including all side effects and any exception conditions that may arise. The ISA provides this definition for each of the instructions the CPU can perform, hence defining the CPU's "instruction set". Examples of instructions implemented by most computers include "move", "add", "subtract", "call" (for a procedure or subroutine), "compare", and "branch" or "jump" instructions. These instructions are comparable to verbs, specifically directives, in a natural language.
An ISA defines many other aspects of the CPU's machine language. These include the types of data that the instructions can operate on, and how to refer to the various types of storage in which the data can reside (such as registers and memory). In terms of the instruction set these are generally called "operands". For operands in main memory, the ISA may provide a number of different "addressing modes" by which memory addresses can be specified. Finally, an ISA usually defines various elements of the computer called, for example, "system programming" features. These features are usually not accessed directly by application programs, but are essential to the function of operating systems. The machine language is closely associated with "assembly language", and developers of programming tools such as assemblers, compilers, and debuggers require knowledge of the machine language.
A realization of an ISA is called an implementation. Prior to the development of formal ISA specifications the computer's architecture was usually designed by the hardware engineers along with the first (sometimes only) implementation; the ISA was whatever resulted. By contrast, a formal ISA specification permits multiple implementations that may vary in performance, physical size, and monetary cost (among other things). Because the ISA is common to all such implementations, software that comports to the ISA can run on different implementations of the same ISA. This has enabled software compatibility between different models and even different generations of computers. These developments have helped to lower the cost of computers and to increase their applicability. For these reasons, the development of formal ISAs was extremely important step in the history of computers.
If you want to make changes rather than starting from scratch yourself, simply edit the above section (and btw I think embedded inline sigs for each change would be pointless). But if you do that I may change them back or riff further on your ideas. Or, copy it into your own subsection and edit there if it seems better to do that. I'm not saying the lede has to be based on this, even a little - this is just my current thinking about what it should say.
Jeh ( talk) 19:05, 29 May 2017 (UTC)
...includes bits from my original version that I've since culled. May or may not have a place in the rest of the article.
The word "architecture" may also be used in terms like "microarchitecture", "memory architecture", and so on, which refer to other descriptions of a computer's organization. "instruction set architecture" is specific to the topic of this article, the definition of the CPU's machine language.
Very little programming is done directly in machine language, but each ISA is normally associated with a symbolic language called an "assembly language". Assembly language has close to a one-to-one relationship with the elements of the machine language, but is far easier for programmers to write and to understand. In assembly language the instructions defined by the ISA are usually represented by short words or abbreviations of words, such as "move" or "mov" for the "move" operation. These are called "mnemonics". Assembly language is converted to machine language by a program called an assembler. An ISA specification may suggest the mnemonics for each of the ISA's instructions, or may leave these up to the implementor of the assembler.
Most programmers work not in assembly language but in any of several higher-level languages; these are converted to the machine language via a compiler. Programmers who develop either assemblers or compilers, or other programming tools such as debuggers, must be familiar with the CPU's ISA to write these programs. Knowledge of the computer's ISA is also essential in low-level debugging of both application programs and operating system code.
One of the earliest and most influential formal ISA specifications was the one IBM released describing its then-new "System/360" line of commputer, entitled IBM System/360 Principles of Operation. It defined an architecture that was first implemented by machines spanning performance and memory size ranges of approximately ten to one. This ISA was later extended to define the IBM System/370 ISA and then the IBM Z-architecture, each time with the previous architecture included as a subset. Because of this, programs that ran on the smallest of the original IBM System/360 models can run unchanged on the latest Z-architecture machines. Architectures that are extended this way are said to be backwards compatible in that implementations of the later version of the architecture remain compatible with programs coded to the earlier versions. Jeh ( talk) 23:46, 29 May 2017 (UTC)
I think this version is a much gentler and more comprehensive overview of the topic than mine. I would endorse a copyedited version of it. I currently have two remarks about the proposed version:
50504F ( talk) 07:44, 30 May 2017 (UTC)
Jeh ( talk) 10:31, 30 May 2017 (UTC)
Couldn't we just write that instead of the current "… is an abstract model of a computer". User:ScotXW t@lk 19:10, 14 July 2017 (UTC)
There is a {{ cn}} related to DSPs and Harvard architecture which, as usual, doesn't say what it wants cited. Most, but maybe not all, DSPs are Harvard architecture. That is easy to find out. Most have a multiply-accumulate, that is easy to find out. Do all do it in one cycle? Maybe they pipeline it, so one can start every cycle. Maybe some take two cycles. Harvard architecture is also convenient, even when speed isn't important, when instructions are in ROM (or EPROM or flash), and RAM is small (and in RAM). That is true for many modern microcontrollers. But yes for DSPs, having separate data bus allows instructions and data to fetch at the same time. That is likely documented, but the thoughts of the designer may be harder to find. So, what exactly needs to be cited? Gah4 ( talk) 23:15, 10 June 2021 (UTC)
As written under the section register pressure
While embedded instruction sets [...] suffer from extremely high register pressure because they have small register sets, general-purpose RISC ISAs [...] enjoy low register pressure
doesn't sound right. Afaik general purpose ISAs should not suffer as much because the offload of data to primary storage shouldn't be as penalising. Spillage should be easier to handle in a general purpose risc compared to an embedded system. Furthermore non embedded systems tend to have a higher register number, decreasing the likelyhood of spillage in the first place. But there seems to be no reason for low register pressure and therefore reducing the utilisation of registers in favour of primary storage. Hu1buerger ( talk) 19:58, 9 July 2021 (UTC)
This is due to the many addressing modes and optimizations (such as sub-register addressing, memory operands in ALU instructions, absolute addressing, PC-relative addressing, and register-to-register spills) that CISC ISAs offer.While it may [c] be true for the Intel 80xx family and its clones, it is most decidedly not true for CISCs in general. -- Shmuel (Seymour J.) Metz Username:Chatul ( talk) 14:04, 21 November 2023 (UTC)
USING
:-) a register, to provide something similar to PC-relative addressing for position-independent code. That's used in RISC ABIs as well as
the ABI for a CISC ISA that lacks arbitrary PC-relative instruction operands. Perhaps what they mean is that PC-relative addressing for operands means you don't need to use a GPR loaded with a procedure call instruction to refer to the GOT, again reducing memory consumption by one register. (As I remember from being at Sun when the SunOS 4.0 dynamic linking mechanism in the 1980s, from which the SVR4/ELF mechanism is derived, the offset of the beginning of the GOT from the beginning of the code that uses it is determined at link time ("link" as in "link loader", not "dynamically linking at run time"), so references to the GOT are position-independent.) That appears to be the case, given what section 3.5.3 "Position-Independent Function Prologue" in the x86-64 ABI says:In the small code model all addresses (including GOT entries) are accessible via the IP-relative addressing provided by the AMD64 architecture. Hence there is no need for an explicit GOT pointer and therefore no function prologue for setting it up is necessary.
Notes
@
Digital27: Edit
special:Permalink/1185690518 appropriately removed the text also called
computer architecture,
. I believe that there should still be some mention of an instruction set architecture being a subset of a computer architecture, but I am not sure of how much it should say, how to word it or whether it belongs inline or in a hatnote. Thoughts? --
Shmuel (Seymour J.) Metz Username:Chatul (
talk) 15:36, 20 November 2023 (UTC)
In computer science and computer engineering, computer architecture is a description of the structure of a computer system made from component parts. [1] It can sometimes be a high-level description that ignores details of the implementation. [2] At a more detailed level, the description may include the instruction set architecture design, microarchitecture design, logic design, and implementation. [3]
References
Architecture describes the internal organization of a computer in an abstract way; that is, it defines the capabilities of the computer and its programming model. You can have two computers that have been constructed in different ways with different technologies but with the same architecture.
This task has many aspects, including instruction set design, functional organization, logic design, and implementation.
The second paragraph of the lead says
In general, an ISA defines the supported instructions, data types, registers, the hardware support for managing main memory, fundamental features (such as the memory consistency, addressing modes, virtual memory), and the input/output model of implementations of the ISA.
To what does "the hardware support for managing main memory" refer? Given that, right afterwards, the paragraph speaks of "fundamental features" such as "memory consistency, addressing modes, and virtual memory", presumably it does not refer to any of those. Given that the physical interface between the CPU and main memory is a characteristic of a particular implementation of an ISA, not of the ISA itself, it presumably also doesn't refer to that.
Perhaps if some aspects of a CPU cache are visible at the ISA level, such as cache prefetch and flushing instructions (which might behave differently on different implementations, and might even be no-ops on some implementations), or instructions that return information about that cache, being present in the ISA, that might be what it refers to.
I've added a {{clarify}} tag to "hardware support for managing main memory". Guy Harris ( talk) 05:25, 24 April 2024 (UTC)
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Instruction set architecture article. This is not a forum for general discussion of the article's subject. |
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Find sources: Google ( books · news · scholar · free images · WP refs) · FENS · JSTOR · TWL |
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Suggested addition concerning the encoding of instructions: Instructions are encoded in a prefix code, enabling the processor to decode a sequence of concatenated instructions in memory without any ambiguities. — Preceding unsigned comment added by 46.116.12.41 ( talk) 13:30, 16 November 2011 (UTC)
I have included a simple definition for mortals.
in the first sentence there's a link to instruction (computer science) that redirects to the article itself (an endless recursion if you will) - what's that supposed to be? I didn't wanna take that off before asking here. thnx! —Preceding unsigned comment added by 84.111.72.161 ( talk) 17:58, 8 March 2011 (UTC)
The lengthy assembly language article discusses basic instruction set elements that seem better placed here. This article, in contrast, goes into relatively great detail about ISA and engineering issues not of interest to the general reader. Basically, instruction set strikes me as a fundamental encyclopedic entry, one that should be accessible to the non-engineer. I suggest moving the deeper wires-and-pliers content into an ISA article, and into others (microprogramming, RISC,...). I think we should make this a more general/overview discussion of how CPUs work -- registers, interrupts, stacks, addressing modes, etc., preferably with some nice pictures. Much of what remains here should consist of overview statements with links to specific hardware topics. Comments? Trevor Hanson 21:13, 27 October 2006 (UTC)
0-operand ("zero address machines") -- these are also called stack machines, and all operations take place using the top one or two positions on the stack. Adding two numbers here can be done with four instructions: push a, push b, add, pop c;
Why is it called 0-operand even though a, b and c are operands? -- Abdull 12:19, 2 December 2006 (UTC)
Alas, while I find myself agreeing with HenkeB, I must point out that people talking about computer architecture often use "operand" very differently than people talking about math. An assembler creates the bit pattern for a full instruction by combining (typically) 2 groups of bits. One group (the "opcode") chooses the kind of operation the instruction does, and also decides the length and format of the other group of bits. The other group of bits in a full instruction are the "operands". Each operand is either a literal value, the "address" of a particular register, or a memory address. (The actual *values* in that register or at that memory location are not "operands" in this sense). The "zero-operand" machines have instructions that are all-opcode, no-operand. The TTA machines are the opposite extreme -- no bits of opcode, all the bits are in the operand.
I suspect the example "push a, push b, add, pop c;" may be unnecessarily confusing. It certainly appears to have 1 operand. I've seen a "zero-operand" machine that truly has no operands -- [ The Minimal CISC] -- but this is just a toy.
Perhaps a less-confusing example would be based on a serious "zero-operand" machine: "constant a, load, constant b, load, add, constant c, store". The "push address constant to stack" instruction is the only instruction that has one operand. All other instructions (including "load" and "store") have zero operands. -- 68.0.120.35 07:15, 4 October 2007 (UTC)
Hy, I'm looking for a "family tree" like the one for programing languages found here [2] Anyone have ever seen one? -- 84.56.183.114 09:15, 5 February 2007 (UTC)
Should SWEET16 be added? It was a useful software implemented ISA created by Steve Wozniak. -- 88.90.140.47 20:41, 13 February 2007 (UTC)
Most RISC Processors actually use Three operands. Read the paper by John Cocke Listed under the IBM 801 article to see why. 66.73.48.200 21:37, 6 July 2007 (UTC)Fingal
I think there's difference between "instruction set" and "instruction set architecture". So there's need to split. Callmejosh ( talk) 10:02, 28 August 2008 (UTC)
Would someone please give us a 2-sentence definition of "instruction set" and of "instruction set architecture", so the rest of us can see this difference? -- 68.0.124.33 ( talk) 03:51, 9 September 2008 (UTC)
Let me try-
instruction set:
instruction set architecture:
Thats more than 2 sentences, but being a kernel hacker I really want these to be two separate articles. —Preceding unsigned comment added by 70.89.148.13 ( talk) 15:29, 5 October 2008 (UTC)
This article lists IBM System/360 and S/370 as hardware implementations. Most models of the S/360 and S/370 were implemented with software in Read Only Storage (ROS) for the older models and Writable Control Store (WCS) for the newer models. The only hardware implementations were
All of these
and every S/370, 43xx and 30xx other than the 370/195 was microprogrammed. Shmuel (Seymour J.) Metz Username:Chatul ( talk) 19:07, 22 November 2010 (UTC)
There are a number of ways to improve code density; high code density does not imply that all of them were used. In particulary, high code density does not imply that there are special instructions for subroutine call and return, nor are such instructions part of the definition of CISC. Shmuel (Seymour J.) Metz Username:Chatul ( talk) 12:31, 19 September 2012 (UTC)
Surely someone other than Intel has written and published a slightly less product-specific discussion of the general concepts related to computer instruction sets? Better references are needed. -- Wtshymanski ( talk) 14:58, 9 October 2012 (UTC)
In addition to machines such as the UNIVAC 1108, with separate I-bank and E-bank within the same physical memory, the machines designed to simulate a common architecture, e.g, most S/360 models, had a read-only storage for Microcode with a different word size than that of the writable memory. I'm not sure how much detail belongs in the article on that point. Shmuel (Seymour J.) Metz Username:Chatul ( talk) 19:09, 18 January 2013 (UTC)
I see that the article for "Instruction (computer science)" was merged into this article in January 2011. I believe this was a mistake. Someone who is attempting to understand basic computer science needs to grasp the concept of a computer instruction before learning about sets of them or, shudder, being exposed to instruction set architecture in all its glory.
If you read the lead you will see there is no attempt at defining what an "instruction set" is a set of!
In general, we need to be able to link the word "instruction" to some text somewhere that defines that term and is understandable to such a person. I would prefer this be a separate article, but at the least this article should have a linkable section that clearly and simply defines what a computer instruction is (in traditional architecture).
In general I am of the school of Wikipedians that favors lots of concise articles on specific concepts over articles that try to cover a broad group of subjects, and that grow and grow and seem to gradually lose their coherence as they grow. (Not that this would apply to this article, mind you. :) )
So how can we solve this problem?
Tell me what you think. Thanks! Frappyjohn ( talk) 01:58, 1 March 2013 (UTC)
>>When some of the operands are given implicitly, the number of specified operands in an instruction is smaller than the arity of the operation. When a "destination operand" explicitly specifies the destination, the number of operand specifiers in an instruction is larger than the arity of the operation.<<
I understand the first sentence, but in the second sentence's case, shouldn't the number of operand specifiers be EQUAL as the arity? If not, why? SyP ( talk) 11:57, 18 April 2013 (UTC)
The Design section mentions "Zilog Z80 uses the eight codes ". That is true, but the opcodes were originally part of the hardware interrupt on the Intel 8080. Since the Z80 added support for a vector table, the opcodes could be used for other purposes - like a tiny subroutine call. (Which several Microsoft BASICs made use of.) Wmdgus73 ( talk) 04:11, 20 October 2013 (UTC)
What characterizes RISC is not the number of opcodes but their regularity and the simplicity of the operations. Specifically, in a RISC, instruction fetching, scheduling and execution take the same amount of time regardless of the opcode. Of course, cache misses and register conflicts can introduce delays, but those are a function of the execution profile rather than the individual opcode.
As an example, the IBM POWER microprocessors have a RISC architectue the IBM 7090 is a CISC, even though the 7090 has far fewer instructions. Shmuel (Seymour J.) Metz Username:Chatul ( talk) 17:46, 3 December 2013 (UTC)
The article says: "More complex operations are built up by combining these simple instructions, which (in a von Neumann architecture) are executed sequentially, or as otherwise directed by control flow instructions." Can someone explain how the sequential execution of instructions is related to the Von Neumann architecture? Couldn't the Harvard architecture execute the instructions one-by-one too? Maybe we should refactor this sentence... It's also unsourced. Sofia Koutsouveli ( talk) 15:58, 22 March 2014 (UTC)
See the discussion at talk:processor design#permission to use an instruction set.
I understand their coming to x86 ( AVX-512?), not sure if they should fall under "Complex instructions"-heading..
I just find them intriguing. No matter where they should be put, I think they should be included..
[Also not mainstream yet are instructions for complex numbers (can you think of other non-ordinary not included here?). Since can be broken down, I do not really expect them in RISCs; nor x86 really (e.g. in above). I'm aware of some designs for logaritmic number systems [for them], but I guess in no actually used chips? Complex numbers can be used for neural networks.. while often only real-valued used [or with such instructions..].] comp.arch ( talk) 15:33, 28 March 2017 (UTC)
The article's lead presently says:
An instruction set, with its instruction set architecture (ISA), is the interface between a computer's software and its hardware, and thereby enables the independent development of these two computing realms; it defines the valid instructions that a machine may execute.
It is the part of the computer architecture related to programming, including the native data types, instructions, registers, addressing modes, memory architecture, interrupt and exception handling, and external I/O. An ISA includes a specification of the set of opcodes (machine language), and the native commands implemented by a particular processor.
This has several problems:
This leads to the article's title. Given the history of the term "ISA" and that in some ISAs, an "instruction set" is a component of the ISA, it makes more sense that the article be titled "Instruction set architecture", since this title is capable of encompassing all possible definitions, whereas "Instruction set" cannot. 50504F ( talk) 06:50, 9 May 2017 (UTC)
One of the most important abstractions is the interface between the hardware and the lowest-level software. Because of its importance, it is given a special name: the instruction set architecture, or simply architecture, of a computer.
(Also called architecture). An abstract interface between the hardware and the lowest-level software that encompasses all the information necessary to write a machine language program that will run correctly, including instructions, registers, memory access, and so on.
To command a computer's hardware, you must speak its language. The words of a computer's language are called instructions, and its vocabulary is called an instruction set.
The vocabulary of commands understood by a given architecture.
Computer architecture describes the user's view of a computer. The instruction set, visible registers, memory management table structures and exception handling model are all part of the architecture.
Computer architecture refers to those attributes that have a direct impact on the logical execution of a program. ... Examples of architectural attributes include the instruction set...
An instruction set, or instruction set architecture (ISA)...
I've rewritten the the lead to fix the issues raised. It's much better than before, but given the broad scope and sophistication of the topic, I suspect that the lead is still imperfect. A review of the edits would be very helpful. 50504F ( talk) 05:42, 17 May 2017 (UTC)
The lead section (which I'm mostly responsible for), as of 29 May 2017, says:
An instruction set architecture (ISA) is an abstract model of a computer. It is also referred to as architecture or computer architecture. A realization of an ISA is called an implementation. An ISA permits multiple implementations that may vary in performance, physical size, and monetary cost (among other things); because the ISA serves as the interface between software and hardware. Software that has been written for an ISA can run on different implementations of the same ISA. This has enabled binary compatibility between different generations of computers to be easily achieved, and the development of computer families. Both of these developments have helped to lower the cost of computers and to increase their applicability. For these reasons, the ISA is one of the most important abstractions in computing today.
An ISA defines everything a machine language programmer needs to know in order to program a computer. What an ISA defines differs between ISAs; in general, ISAs define the supported data types, what state there is (such as the main memory and registers) and their semantics (such as the memory consistency and addressing modes), the instruction set (the set of machine instructions that comprises a computer's machine language), and the input/output model.
Reading the lead section leads to see two possible issues:
Feedback would be helpful. 50504F ( talk) 06:40, 29 May 2017 (UTC)
Here's my first pass at an improvement. It probably contains much detail that is already in the article body; I haven't checked. I haven't been careful about quote marks vs italics, or other details of wikimarkup, either.
The challenge that must be met by the lede here is that many of the terms used to describe the concept of "ISA" will, like "ISA", also be unfamiliar to the general reader, and we shouldn't depend on WLs for everything.
A computer's instruction set architecture (ISA) (also referred to as "instruction set", or less rigorously, "computer architecture" or simply "architecture") is a functional description of a computer's central processing unit (CPU). It is an "abstract model" of a computer's CPU, in that it only provides a functional description, with no requirements of how those functions are to be implemented.
The primary role of an ISA is to define the "machine language" in which programs for the computer are coded. This language is usually, in the architecture specification, described using binary, octal, or hexadecimal notation. For example, an instruction to "move" data from one place to the other might be coded in the computer's memory as D0 (hexadecimal). The ISA defines this coding and describes exactly what the processor will do when it encounters this instruction, including all side effects and any exception conditions that may arise. The ISA provides this definition for each of the instructions the CPU can perform, hence defining the CPU's "instruction set". Examples of instructions implemented by most computers include "move", "add", "subtract", "call" (for a procedure or subroutine), "compare", and "branch" or "jump" instructions. These instructions are comparable to verbs, specifically directives, in a natural language.
An ISA defines many other aspects of the CPU's machine language. These include the types of data that the instructions can operate on, and how to refer to the various types of storage in which the data can reside (such as registers and memory). In terms of the instruction set these are generally called "operands". For operands in main memory, the ISA may provide a number of different "addressing modes" by which memory addresses can be specified. Finally, an ISA usually defines various elements of the computer called, for example, "system programming" features. These features are usually not accessed directly by application programs, but are essential to the function of operating systems. The machine language is closely associated with "assembly language", and developers of programming tools such as assemblers, compilers, and debuggers require knowledge of the machine language.
A realization of an ISA is called an implementation. Prior to the development of formal ISA specifications the computer's architecture was usually designed by the hardware engineers along with the first (sometimes only) implementation; the ISA was whatever resulted. By contrast, a formal ISA specification permits multiple implementations that may vary in performance, physical size, and monetary cost (among other things). Because the ISA is common to all such implementations, software that comports to the ISA can run on different implementations of the same ISA. This has enabled software compatibility between different models and even different generations of computers. These developments have helped to lower the cost of computers and to increase their applicability. For these reasons, the development of formal ISAs was extremely important step in the history of computers.
If you want to make changes rather than starting from scratch yourself, simply edit the above section (and btw I think embedded inline sigs for each change would be pointless). But if you do that I may change them back or riff further on your ideas. Or, copy it into your own subsection and edit there if it seems better to do that. I'm not saying the lede has to be based on this, even a little - this is just my current thinking about what it should say.
Jeh ( talk) 19:05, 29 May 2017 (UTC)
...includes bits from my original version that I've since culled. May or may not have a place in the rest of the article.
The word "architecture" may also be used in terms like "microarchitecture", "memory architecture", and so on, which refer to other descriptions of a computer's organization. "instruction set architecture" is specific to the topic of this article, the definition of the CPU's machine language.
Very little programming is done directly in machine language, but each ISA is normally associated with a symbolic language called an "assembly language". Assembly language has close to a one-to-one relationship with the elements of the machine language, but is far easier for programmers to write and to understand. In assembly language the instructions defined by the ISA are usually represented by short words or abbreviations of words, such as "move" or "mov" for the "move" operation. These are called "mnemonics". Assembly language is converted to machine language by a program called an assembler. An ISA specification may suggest the mnemonics for each of the ISA's instructions, or may leave these up to the implementor of the assembler.
Most programmers work not in assembly language but in any of several higher-level languages; these are converted to the machine language via a compiler. Programmers who develop either assemblers or compilers, or other programming tools such as debuggers, must be familiar with the CPU's ISA to write these programs. Knowledge of the computer's ISA is also essential in low-level debugging of both application programs and operating system code.
One of the earliest and most influential formal ISA specifications was the one IBM released describing its then-new "System/360" line of commputer, entitled IBM System/360 Principles of Operation. It defined an architecture that was first implemented by machines spanning performance and memory size ranges of approximately ten to one. This ISA was later extended to define the IBM System/370 ISA and then the IBM Z-architecture, each time with the previous architecture included as a subset. Because of this, programs that ran on the smallest of the original IBM System/360 models can run unchanged on the latest Z-architecture machines. Architectures that are extended this way are said to be backwards compatible in that implementations of the later version of the architecture remain compatible with programs coded to the earlier versions. Jeh ( talk) 23:46, 29 May 2017 (UTC)
I think this version is a much gentler and more comprehensive overview of the topic than mine. I would endorse a copyedited version of it. I currently have two remarks about the proposed version:
50504F ( talk) 07:44, 30 May 2017 (UTC)
Jeh ( talk) 10:31, 30 May 2017 (UTC)
Couldn't we just write that instead of the current "… is an abstract model of a computer". User:ScotXW t@lk 19:10, 14 July 2017 (UTC)
There is a {{ cn}} related to DSPs and Harvard architecture which, as usual, doesn't say what it wants cited. Most, but maybe not all, DSPs are Harvard architecture. That is easy to find out. Most have a multiply-accumulate, that is easy to find out. Do all do it in one cycle? Maybe they pipeline it, so one can start every cycle. Maybe some take two cycles. Harvard architecture is also convenient, even when speed isn't important, when instructions are in ROM (or EPROM or flash), and RAM is small (and in RAM). That is true for many modern microcontrollers. But yes for DSPs, having separate data bus allows instructions and data to fetch at the same time. That is likely documented, but the thoughts of the designer may be harder to find. So, what exactly needs to be cited? Gah4 ( talk) 23:15, 10 June 2021 (UTC)
As written under the section register pressure
While embedded instruction sets [...] suffer from extremely high register pressure because they have small register sets, general-purpose RISC ISAs [...] enjoy low register pressure
doesn't sound right. Afaik general purpose ISAs should not suffer as much because the offload of data to primary storage shouldn't be as penalising. Spillage should be easier to handle in a general purpose risc compared to an embedded system. Furthermore non embedded systems tend to have a higher register number, decreasing the likelyhood of spillage in the first place. But there seems to be no reason for low register pressure and therefore reducing the utilisation of registers in favour of primary storage. Hu1buerger ( talk) 19:58, 9 July 2021 (UTC)
This is due to the many addressing modes and optimizations (such as sub-register addressing, memory operands in ALU instructions, absolute addressing, PC-relative addressing, and register-to-register spills) that CISC ISAs offer.While it may [c] be true for the Intel 80xx family and its clones, it is most decidedly not true for CISCs in general. -- Shmuel (Seymour J.) Metz Username:Chatul ( talk) 14:04, 21 November 2023 (UTC)
USING
:-) a register, to provide something similar to PC-relative addressing for position-independent code. That's used in RISC ABIs as well as
the ABI for a CISC ISA that lacks arbitrary PC-relative instruction operands. Perhaps what they mean is that PC-relative addressing for operands means you don't need to use a GPR loaded with a procedure call instruction to refer to the GOT, again reducing memory consumption by one register. (As I remember from being at Sun when the SunOS 4.0 dynamic linking mechanism in the 1980s, from which the SVR4/ELF mechanism is derived, the offset of the beginning of the GOT from the beginning of the code that uses it is determined at link time ("link" as in "link loader", not "dynamically linking at run time"), so references to the GOT are position-independent.) That appears to be the case, given what section 3.5.3 "Position-Independent Function Prologue" in the x86-64 ABI says:In the small code model all addresses (including GOT entries) are accessible via the IP-relative addressing provided by the AMD64 architecture. Hence there is no need for an explicit GOT pointer and therefore no function prologue for setting it up is necessary.
Notes
@
Digital27: Edit
special:Permalink/1185690518 appropriately removed the text also called
computer architecture,
. I believe that there should still be some mention of an instruction set architecture being a subset of a computer architecture, but I am not sure of how much it should say, how to word it or whether it belongs inline or in a hatnote. Thoughts? --
Shmuel (Seymour J.) Metz Username:Chatul (
talk) 15:36, 20 November 2023 (UTC)
In computer science and computer engineering, computer architecture is a description of the structure of a computer system made from component parts. [1] It can sometimes be a high-level description that ignores details of the implementation. [2] At a more detailed level, the description may include the instruction set architecture design, microarchitecture design, logic design, and implementation. [3]
References
Architecture describes the internal organization of a computer in an abstract way; that is, it defines the capabilities of the computer and its programming model. You can have two computers that have been constructed in different ways with different technologies but with the same architecture.
This task has many aspects, including instruction set design, functional organization, logic design, and implementation.
The second paragraph of the lead says
In general, an ISA defines the supported instructions, data types, registers, the hardware support for managing main memory, fundamental features (such as the memory consistency, addressing modes, virtual memory), and the input/output model of implementations of the ISA.
To what does "the hardware support for managing main memory" refer? Given that, right afterwards, the paragraph speaks of "fundamental features" such as "memory consistency, addressing modes, and virtual memory", presumably it does not refer to any of those. Given that the physical interface between the CPU and main memory is a characteristic of a particular implementation of an ISA, not of the ISA itself, it presumably also doesn't refer to that.
Perhaps if some aspects of a CPU cache are visible at the ISA level, such as cache prefetch and flushing instructions (which might behave differently on different implementations, and might even be no-ops on some implementations), or instructions that return information about that cache, being present in the ISA, that might be what it refers to.
I've added a {{clarify}} tag to "hardware support for managing main memory". Guy Harris ( talk) 05:25, 24 April 2024 (UTC)