The ARM Neoverse is a group of 64-bit ARM processor cores licensed by Arm Holdings. The cores are intended for datacenter, edge computing, and high-performance computing use. The group consists of ARM Neoverse V-Series, ARM Neoverse N-Series, and ARM Neoverse E-Series. [1] [2]
The Neoverse V-Series processors are intended for high-performance computing.
Neoverse V1 (code named Zeus [3]) is derived from the Cortex-X1 [4] and implements the ARMv8.4-A instruction set and some part of ARMv8.6-A. [5] It was officially announced by Arm on September 22, 2020. [6] It is said to be initially realized with a 7 nm process from TSMC. One of the changes from the X1 is that it supports SVE 2x256-bit.
According to The Next Platform, the AWS Graviton3 is based on the Neoverse V1. [7] [8]
Neoverse V2 (code named Demeter) is derived from the ARM Cortex-X3 and implements the ARMv9.0-A instruction set. It was officially announced by Arm on September 14, 2022. [9] [10] NVIDIA Grace, [11] AWS Graviton4 [12] and Google Axion [13] are based on the Neoverse V2.
Notable changes from the Neoverse V1: [14]
Neoverse V3, (code named Poseidon) was teased by Arm alongside the V2 and E2 announcements. [15] It is targeted for systems including DDR5, PCIe gen6, and CXL 3.0. The codename Poseidon was first used for the generation succeeding Zeus, now V1, and targeted for 2021 on a 5nm node. [16]
The Neoverse N-Series processors are intended for core datacenter usage.
On February 20, 2019, Arm announced the Neoverse N1 microarchitecture (code named Ares) derived from the Cortex-A76 redesigned for infrastructure/server applications. The reference design supports up to 64 or 128 Neoverse N1 cores. [17] [18]
Notable changes from the Cortex-A76:
Neoverse N1 implements the ARMv8.2-A instruction set.
The Ampere Altra (2-socket 80-core) and AWS Graviton2 (64-core) CPU platforms are based on Neoverse N1 cores and were released in 2020. [19]
The Neoverse N2 (code named Perseus) is derived from the Cortex-A710 and implements the ARMv9.0-A instruction set. [19] It was officially announced by Arm on September 22, 2020. [6] On August 28, 2023, Arm announced the Neoverse CSS N2 (Genesis), a customizable CPU subsystem implementation by Arm to reduce the time to market for customers. [20] [21] [22] [23] Microsoft Azure Cobalt 100 128 Core CPU uses Neoverse N2. [24]
Notable changes from the Neoverse N1: [25] [26]
Neoverse N-Next, presumably N3, was teased by Arm alongside the V2 and E2 announcements. [15] It is targeted for systems including DDR5, PCIe gen6, and CXL 3.0.
The Neoverse E-Series processors are intended for edge computing. They are designed for increased data throughput at decreased power consumption.
Neoverse E1 is derived from the Cortex-A65AE [27] and implements the ARMv8.2-A instruction set. It support SMT.
Neoverse E2 is derived from the Cortex-A510 [15] and implements the ARMv9-A instruction set.
Neoverse E-Next, presumably E3, was teased by Arm alongside the V2 and E2 announcements. [15] It is targeted for systems including DDR5, PCIe gen6, and CXL 3.0.
INT8 | BF16 | FP32 | FP64 | |
---|---|---|---|---|
Neoverse N1 [28] | 64 | 32 | 16 | 8 |
Neoverse N2 [28] | 128 | 64 | 16 | 8 |
Neoverse V1 [28] | 256 | 128 | 32 | 16 |
Intel 3rd Gen Xeon SP [29] | 256 | — | 64 | 32 |
Intel 4th Gen Xeon SP [29] | 2048 | 1024 | 64 | 32 |
With code name Poseidon a successor for Neoverse V1 (aka Zeus) [30] was first publicly mentioned on TechCon 2018. Actual introduction (used by third party chip designers in their products) was given in form of a rough target date of 2021. Its initial realization process is said to be 5 nm by TSMC.
The ARM Neoverse is a group of 64-bit ARM processor cores licensed by Arm Holdings. The cores are intended for datacenter, edge computing, and high-performance computing use. The group consists of ARM Neoverse V-Series, ARM Neoverse N-Series, and ARM Neoverse E-Series. [1] [2]
The Neoverse V-Series processors are intended for high-performance computing.
Neoverse V1 (code named Zeus [3]) is derived from the Cortex-X1 [4] and implements the ARMv8.4-A instruction set and some part of ARMv8.6-A. [5] It was officially announced by Arm on September 22, 2020. [6] It is said to be initially realized with a 7 nm process from TSMC. One of the changes from the X1 is that it supports SVE 2x256-bit.
According to The Next Platform, the AWS Graviton3 is based on the Neoverse V1. [7] [8]
Neoverse V2 (code named Demeter) is derived from the ARM Cortex-X3 and implements the ARMv9.0-A instruction set. It was officially announced by Arm on September 14, 2022. [9] [10] NVIDIA Grace, [11] AWS Graviton4 [12] and Google Axion [13] are based on the Neoverse V2.
Notable changes from the Neoverse V1: [14]
Neoverse V3, (code named Poseidon) was teased by Arm alongside the V2 and E2 announcements. [15] It is targeted for systems including DDR5, PCIe gen6, and CXL 3.0. The codename Poseidon was first used for the generation succeeding Zeus, now V1, and targeted for 2021 on a 5nm node. [16]
The Neoverse N-Series processors are intended for core datacenter usage.
On February 20, 2019, Arm announced the Neoverse N1 microarchitecture (code named Ares) derived from the Cortex-A76 redesigned for infrastructure/server applications. The reference design supports up to 64 or 128 Neoverse N1 cores. [17] [18]
Notable changes from the Cortex-A76:
Neoverse N1 implements the ARMv8.2-A instruction set.
The Ampere Altra (2-socket 80-core) and AWS Graviton2 (64-core) CPU platforms are based on Neoverse N1 cores and were released in 2020. [19]
The Neoverse N2 (code named Perseus) is derived from the Cortex-A710 and implements the ARMv9.0-A instruction set. [19] It was officially announced by Arm on September 22, 2020. [6] On August 28, 2023, Arm announced the Neoverse CSS N2 (Genesis), a customizable CPU subsystem implementation by Arm to reduce the time to market for customers. [20] [21] [22] [23] Microsoft Azure Cobalt 100 128 Core CPU uses Neoverse N2. [24]
Notable changes from the Neoverse N1: [25] [26]
Neoverse N-Next, presumably N3, was teased by Arm alongside the V2 and E2 announcements. [15] It is targeted for systems including DDR5, PCIe gen6, and CXL 3.0.
The Neoverse E-Series processors are intended for edge computing. They are designed for increased data throughput at decreased power consumption.
Neoverse E1 is derived from the Cortex-A65AE [27] and implements the ARMv8.2-A instruction set. It support SMT.
Neoverse E2 is derived from the Cortex-A510 [15] and implements the ARMv9-A instruction set.
Neoverse E-Next, presumably E3, was teased by Arm alongside the V2 and E2 announcements. [15] It is targeted for systems including DDR5, PCIe gen6, and CXL 3.0.
INT8 | BF16 | FP32 | FP64 | |
---|---|---|---|---|
Neoverse N1 [28] | 64 | 32 | 16 | 8 |
Neoverse N2 [28] | 128 | 64 | 16 | 8 |
Neoverse V1 [28] | 256 | 128 | 32 | 16 |
Intel 3rd Gen Xeon SP [29] | 256 | — | 64 | 32 |
Intel 4th Gen Xeon SP [29] | 2048 | 1024 | 64 | 32 |
With code name Poseidon a successor for Neoverse V1 (aka Zeus) [30] was first publicly mentioned on TechCon 2018. Actual introduction (used by third party chip designers in their products) was given in form of a rough target date of 2021. Its initial realization process is said to be 5 nm by TSMC.