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IF somebody would just explain the job a CMOS does, that'd help http://simple.wikipedia.org/wiki/CMOS
@ 2006-11-06T22:54Z
@ 2006-11-07T04:31Z
(pasted from an edit in the article that should have been here in the first place) "anyone got any sources for this? i'm sure modern motherboards still store settings in battery backed ram (i know from having to pull the battery from them when people forget the bios password) the bios itself is in flash though maybe whoever wrote this peice was confusing the bios itself with the bios settings" -- Plugwash
sure you can use the jumper if you have the motherboard manual handy but often you don't. The battery on the other hand is easilly spotted and in my experiance it does reset the settings. do you know of any reliable sources saying that settings are stored in flash? Plugwash 02:32, 17 Apr 2005 (UTC)
THANKS FOR THE INFORMATION PROVIDED ON THE CMOS DEVICES AND THE TECHNOLOGY... I FOUND IT VERY MUCH USEFUL ... ACTUALLY I WAS LOOKING FOR SOME SIMPLE LANGUAGE FORMAT OF THE MATERIAL ON THE INTERNET FOR THE STUDENTS......... IT IS REALLY VERY NICE...........
==5 Nov 2003 (UTC)
Thank you for this information. I am a high tech professional and was looking for a definistion for this word, CMOS. After I did google and glance through a few links, I found this site very useful. Thanks Again!!!
thank you for this information.I am a comp. hardware student and i was seeing this history or definition for this word.CMOS after i did get this term through a few links. i found it now in your site thank you and god bless......
Here's a link i'll bookmark here about CMOS imaging.
I'm no wikipedian (yet...) but it might be a good idea to create a CMOS(image_sensor) thingie? /Erik
I added some info on the recent problems with static power consumption. I wonder if is is too much or too little. There is, of course a lot to be said on the subject. For instance, it is not only sub-threshold leakage, but also effects like gate tunneling and several others. The current way of handling this is to use MTCMOS, Multiple Threshold CMOS. This makes it possible to have transistors with different threshold voltages on the same chip. So we can have both high speed, high leakage gates and low speed, low leakage on the same chip. This has been used all the way back to 0.18 micrometre cell libraries.
I have heard reports of some designs that had a static power consumption of up to 50% of total power.
What do you guys think? How much shuld we write about this?
Where are the Missing HYPENS
CMOS stands for Complementary METAL-OXIDE-SEMICONDUCTOR.
This is NOT the same as Complementary Metal Oxide Semiconductor. The Construction method is A base layer of N-type or P-type Semiconductor material (usually SILICON). An insulating layer of Silicon Dioxide is then deposited on the semiconductor layer. A layer of a metal usually Aluminum or tungsten is then deposited on the metal layer . Regions of both P-Type and N-type semiconductor is then made on the the surface. This creates the necessary complementary transistor junctions needed for the basic GATE package. The use of the three layers of METAL,OXIDE,SEMICONDUCTOR is the derivation of the ACRONYM MOS NOT a mythical not existent Metal Oxide Based Semiconductor material. — Preceding unsigned comment added by 203.87.74.39 ( talk) 23:20, 23 July 2004 (UTC)
Currently, the article is using the phrase "Complementary metal–oxide–semiconductor". Why is this using dashes instead of hyphens? Why is the last term joined together with the others? This seems contrary to MOS:DASH and MOS:HYPHEN. — BarrelProof ( talk) 13:19, 26 April 2019 (UTC)
This article is too technical, and needs to be better organized. Andros 1337 21:32, 8 Jan 2005 (UTC)
Pardon me for saying, but this article has little to no context unless you DO use highly technical terms. Trying to explain it in laymens terms would be like trying to explain vector calculus to someone who knows only basic algebra or microkernel theory to someone who has only programmed in Python; there is no context. You can't expect the article on, say, integrals to be simplified for someone with little exposure to formal mathematics, likewise you can't expect an article about an electrical engineering concept to be simplified for someone with no EE experience or knowledge... I can see a few places where clarity (and certainly organization) can be improved, but it is pretty difficult to explain CMOS in terms everyone can understand. -- uberpenguin 23:00, 2005 Jan 14 (UTC)
The article was not too technical, IMO, but it did need to have additional introductory material at the beginning for those readers wanting just the gist. - R. S. Shaw 04:02, 2005 Jan 21 (UTC)
I am reverting this article to the version prior to Akidd dublin's edits on 2 February. The reason for this is that the material added in the introduction is already covered in the introduction and elsewhere and doesn't really clarify anything in my opinion. Furthermore it really breaks the flow of the article and doesn't fit stylistically with the rest of the content or the general Wikipedia standards. If the user who added these edits still feels they belong, could they please try to reformat them to fit better and post here explaining why they feel these changes are necessary before editing the article again. Thanks! -- uberpenguin 13:13, 2005 Feb 2 (UTC)
being stylistically: digital logic can be tricky. the article needs to be rewritten. "wire" "burn"
my NOTICE shows how the CMOS NOT gate works, and covers the power consumption. capitalization: within programming, listings look very much better, thats all. Akidd_dublin 200502061007 1049
the term MOS is already explained in the MOSFET article. my include would describe the term complementary and also the static nature, power is consumed by electric capacities within the structures. the include would make many lines obsolete: means more than a minor edit. indeed there are actual cpu's which are described as being CMOS, but i would guess their technology is derived from CMOS. sometimes i have read the term static design: the technology is in use for low-power applications. Akidd_dublin 200502070852
the circuits burn power: no charges with different electric potential are equalized.*
charging and discharging: charging contains discharging logically or would charge up forever.
various load capacitances: hhm most people can make the assumption of "various"
gate and wire capacitance: basically these are structures of integrated circuits, but i am not happy with the term wires as such.
(mostly..): electrical capacities within the silicion structure? mostly, but also.., some source..: this can vary due to the layout.
whenever they are switched: logic does not have to be clocked but usually it is.
most circuits are CMOS: as far as i know, there is also LOCMOS, SOS and if you have a mobile phone: it's GaAs technology. i am not an expert, have read PIC references and have build circuits with around twenty chip cases.
about my languages: people have never understood me.
however, i could make up examples. the article should orientate to intel, microchip, motorola documentation style, without words like "some".
probably you know yourself from programming references the feeling of instant understanding. but language does not always model the exact physics model: and its only a model.
Akidd_dublin 200502071756
the
SRAM article is of poor quality. the statement chips would consume around one watt is objection. by the way i know the CMOS cookbook but made the experience that circuits have become obsolete because of PAL/GAL PIC. however, i have found a 4060 in a toaster two years ago, used for timing. this would mean the 4000 CMOS logic product line. phillips is providing detailed information about what ACT and so on means.
perhaps the article should outline the timeline, and the excact terms for current circuits, if you say nearly everything nowadays would be CMOS
Akidd_dublin 200502071820
Is CMOS a special case of MIS ( metal insulator semiconductor)?
-- Abdull 17:48, 18 Jun 2005 (UTC)
I find it confusing when the same word means 2 very different things. In this case, we have:
What can we do to reduce the confusion? Is there 2 other terms (other than "CMOS") that would be more appropriate for these 2 things? -- 68.0.124.33 ( talk) 04:02, 23 August 2008 (UTC)
Is there a better article for all the how-to tips on configuring PCs? It doesn't feel to me as if they belong here; I wouldn't put a set of instructions for my CMOS wristwatch here. Where to put the how-to information? -- Wtshymanski 17:18, 20 Jun 2005 (UTC)
It appears this image has been deleted for some reason. Can someone tell me why? I created that image, and if I need to tag it with some rights release that's no problem.
Iain McClatchie 21:41, 27 July 2005 (UTC)
I found the image very helpful. I hope you can find the time to reupload it. - R. S. Shaw 23:41, 27 July 2005 (UTC)
All right, I'll try to get to it this weekend. This time I'll put in a GFDL tag. Grrr. I definitely didn't see this on my home page or watchlist. Iain McClatchie 22:42, 28 July 2005 (UTC)
These are notes for myself or anyone else who feels like contributing. It seems like a lot of artwork, I guess because hardware design, especially process and layout, is quite visual.
Diagrams of various major process options:
For each of those process options, a series of pictures showing how they get built up would be nice. This is a lot of artwork, but I think it's the best way to convey the information.
I'd also like to see a representation of the scale of modern chips. Perhaps artwork of a transistor (100 nm indicated), then an inverter (1 um indicated), that inverter amidst rows of standard cells (10 um indicated), rows of standard cells in a block (100 um indicated), and a micrograph of a chip or full chip layout (1 mm indicated) with a block labelled. Each pic could have a scale and highlight the component in the previous pic.
And, um, if anyone is going to comment that this material has to be structured, broken into many pages, yes, of course, but first it must be written and drawn, which is a lot harder.
Iain McClatchie 21:30, 30 October 2005 (UTC)
Hi,, Can you please explain if their is a chip call "CMOS RAM"? Or where we can find CMOS chip? is with in ROM chip? pat..
THANK YOU SHADDACK FOR HELP....... pat
Could it be said, that
? -- Arnero 17:33, 27 January 2006 (UTC)
Please answere at TTL
So how do CMOS sensors compare to CCDs? I remember reading somewhere that although the CCDs are harder to manufacter, they are better for image quality; but then, I've also read that CMOS sensors are better in that way. And how do 3CCDs compare to a single CMOS? —The preceding unsigned comment was added by 24.23.6.222 ( talk • contribs) .
In addition to high-k dielectics, another approach to gate leakage reduction is to use a silicon superlattice to enhance drive current whilst siultaneously reducing leakage. This has advantages that it can be incorporated into the production process without costly re-tooling and also superadded onto other techniques such as silicon-on-insulator (SOI), giving additive benefits. See "Addressing Gate leakage with Rerengineered Silicon" (www.reed-electronics.com/semiconductor/article/CA6418540?pubdate=3%2F1%2F2007 Lesterruss 10:55, 25 March 2007 (UTC)
Who invented CMOS technology? -- Abdull 22:00, 30 November 2007 (UTC)
I think that the layout is bad. There are no connection to the polysilicon gates, and the desing won't work. See [1] for a good nand layout. —Preceding unsigned comment added by 200.126.158.167 ( talk) 06:53, 18 September 2008 (UTC)
For CMOS setting - For cange or edit in CMOS features in Computer system.we used two methods 1. Standard settings 2. Advance setting —Preceding unsigned comment added by 122.168.14.35 ( talk) 09:26, 4 January 2009 (UTC)
do they use enhancement or depletion mode mosfets? or both? - Omegatron 02:19, July 11, 2005 (UTC)
-- 68.0.124.33 ( talk) 22:11, 22 August 2008 (UTC) (Edited) -- 68.0.124.33 ( talk) 12:09, 28 June 2011 (UTC)
I have a little problem w/the lack of explanation for the NAND layout. If you look at the polies, below them is diffusion. This makes them depletion-type MOSFETs. Now I realize that by convention when a CMOS layout is drawn a single monolithic diffusion is drawn for both the drain and the source, making channel under the gate by default, and that it's up to the reader to intuitively know that below the poly is really substrate or well. Unfortunately, I didn't know that last week, and had to find my prof before I could understand. I think this should be explained in the article. AngusCA ( talk) 05:42, 15 February 2010 (UTC)
In the image Cmos_impurity_profile.PNG, which shows a cross-section of a chip with a CMOS inverter, aren't the Source and Drain mis-identified in the PMOS transistor? Thank you 69.27.178.6 ( talk) 18:15, 6 February 2009 (UTC)
That badly rated page nicely explains some details of state-of-the-art measures to bring down static power consumption of CMOS circuits. It should be merged into the section on static power on this page.
Additionally, the section on static power here needs a brush up as well. -- Joerg Schreiter
Years later...since this seems to be a specialized topic that may be too technical and specific for a general overview article, I've taken off the merge tags and added a see-also here. -- Wtshymanski ( talk) 22:03, 3 October 2012 (UTC)
Baker is an excellent source for the entire subject of this page. It is cited in connection with its discussion of the original patent, but has a lto more to say (about 1000 pages). Brews ohare ( talk) 14:20, 14 October 2009 (UTC)
I'm not sure, but it seems that first paragraph of article contains sentences it should not contain. It references how wide is CMOS in use. It does not define CMOS by itself.
Article contains repetitive topics, also.
User:Vanished user 8ij3r8jwefi
13:59, 28 November 2009 (UTC)
A sentence in the "Temperature range" section reads "There were theoretical indications as early as August 2008 that silicon CMOS will work down to 40 kelvin, or -243 °C.[2]"
Isn't 40 kelvin -233 °C, not -243 °C? Conversely, wouldn't -243 °C be 30 kelvin?
If anyone has read the cited paper (Edwards C, "Temperature control", Engineering & Technology Magazine 26 July - 8 August 2008, IET), please correct one or the other to make them consistent.
Based on the paragraph alone, 40 kelvin is probably correct and -243 °C is probably erroneous. . . —Preceding unsigned comment added by Needlesslystilted ( talk • contribs) 00:44, 11 January 2010 (UTC)
this section is misleading, as it is describing the characteristics of a CMOS Inverter. A CMOS inverter is one example of a CMOS circuit, but not all CMOS circuits are inverters. For example if you were to say "Output is inversion of input" when talking about a CMOS NAND gate (or indeed anything else besides an inverter) you would be wrong.
The other problem with this section are the first two sentences: "CMOS circuits are constructed so that all PMOS transistors must have either an input from the voltage source or from another PMOS transistor. Similarly, all NMOS transistors must have either an input from ground or from another NMOS transistor." The word input should be replaced by source. Usually (and definitely in this case) one thinks of the gate as the input, not the source. Obviously the author is considering the input to the inverter to be separate from the inputs to the individual transistors, which is confusing and unhelpful in my opinion. —Preceding unsigned comment added by Denki23 ( talk • contribs) 05:56, 11 April 2010 (UTC)
I find it interesting that denki23 would start this discussion as his/her first and so far only contribution to wikipedia. There is another examples of this unusual pattern Talk:Voltage-to-current_converter, also involving edits or desired edits by Circuit dreamer. Is denki23 a sock puppet? The user name doesn't even come up normally and this user may in fact not exist. It sure looks like an amateurish attempt at sock puppetry. Maybe its time for someone to investigate. Zen-in ( talk) 16:04, 11 April 2010 (UTC)
This statement from the "Inversion" section is completely nonsensical:
"CMOS circuits are constructed so that all PMOS transistors must have either an input from the voltage source or from another PMOS transistor."
The original author is trying to make the point that, with pFETs in a static CMOS digital circuit, the drain/source terminals are either connected to a positive voltage (greater than the threshold voltage, VT), or be tied to a node which includes the gate of another MOSFET.
This article is hectic and not well-written. The entire article requires a complete overhaul. For example, the "NAND gate in physical layout" section shows a cross section of the silicon stack itself, but there is no gate. There's just two, disjoined transistors. The diagram of the NAND gate's top-level layout doesn't include the layer for a p-well or n-well. Further, I believe that the article should be split in to two: CMOS-as-a-process-technology, and CMOS-as-a-circuit-technology.
I know that Wikipedia has a tag to indicate that an article requires a re-write, but I can find no policy on when a re-write is justified or allowed. I'd really like to fix this article, but I realize that it will require a lot more than some strategically-placed bandages. Can anyone tell me where I should be directing my efforts in requesting an article re-write? —Preceding unsigned comment added by Cinnanom ( talk • contribs) 14:48, 28 August 2010 (UTC)
I don't think this is a very nice article on CMOS. At a minimum, there should be a reference to the 5400 family and a schematic of a NOR so it can be visually compared to a NAND. The inverter's image is repeated twice in the article. This article does not show good substance. Here are some additional comments.
1. The sentence "There are small reverse leakage currents which is formed due to formation of reverse biased between diffusion regions and wells." needs fixing.
2. The sentence "In modern process diode leakage is very small compared to sub threshold and tunnelling currents, so these may be neglected during power calculations." needs corrections.
3. "1.d. Contention current in ratioed circuit" is an incomplete section and it needs expanding.
4. I made several corrections in the "Power: switching and leakage". For some reason, lots of words were capitalized. There were also plenty of misspellings so I assume the section is relatively new.
ICE77 ( talk) 01:08, 22 February 2011 (UTC)
I am already fixing lots of spelling, grammar and punctuation errors for many articles. I have no intention to assume ideas a writer was intending to convey or expand a section that should have been completed by somebody in the first place. I list the things I see that need work and if somebody has more time than me to add, he/she is welcome to add.
ICE77 ( talk) 04:01, 26 February 2011 (UTC)
The most of data signals usually have very low activity factors (0-0.2), except maybe for domino logic (which is used rarely today). I fixed "0.5" used in the article by 0.1 and added link to the paper in which there is a distribution of % of signals vs. their activity factor. In general, I think the "activity factor" is not explained well in the article, in my opinion it should be added as an independent article in Wikipedia (working on it...) Mkostya ( talk) 18:23, 18 August 2012 (UTC)
Some people correctly point out that pass transistor logic and dynamic logic (digital electronics) don't seem to match the description at CMOS#Duality. So when they see circuits in those and other logic family#On-chip design styles, they ask "why is this ... considered a CMOS circuit?" ( Talk:XOR gate#Why is that CMOS?)
My understanding is that there is a very specific logic family F that does match the description at CMOS#Duality. My understanding is that there is a more general category C of circuits constructed from both nFET and pFET transistors that includes many logic families, including F, pass transistor logic, and dynamic logic. The ambiguity arises because most people talking about F call it "CMOS", and most people talking about C call that "CMOS".
There are many other cases where people use the same word to refer to some general category C in one sentence, and the same word to refer to some specific case F in another sentence -- genericized trademark, metonymy, etc. Is there some more specific terms we could at least mention in this article, one term that unambiguously refers to F and a different term that unambiguously refers to C? -- DavidCary ( talk) 01:57, 16 October 2015 (UTC)
"high Vth transistors are used when switching speed is very important, while low Vth transistors are used in speed sensitive paths" doesn't read properly for me. Missing the word "less", perhaps? Sorry if I'm using the wrong approach to flag the issue -- I'm NOT an experienced contributer! Cabbageears ( talk) 01:37, 17 October 2015 (UTC)
The denser VLSI processors 14 nm, 10 nm, Intel's 22 nm etc seem to all use FinFET to achieve the high densities (and low power). Could mention here. Maybe need a clearer separation of CMOS logic from CMOS technology processes ? - Rod57 ( talk) 10:23, 23 June 2017 (UTC)
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Under Technical details is it ok to say that other materials can be used apart from silicon. eg Germanium [3] for research. Does GaN enhancement mode transistors [4] mean GaN could be used for CMOS? If not, what else is needed ? - Rod57 ( talk) 13:32, 28 May 2018 (UTC)
"CMOS technology was initially overlooked by the American semiconductor industry in favour of NMOS" ... is the reason given correct? (NMOS was more powerful) Wasn't CMOS more complicated to fabricate vs NMOS? More layers? NMOS allowed more transistors per die?
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IF somebody would just explain the job a CMOS does, that'd help http://simple.wikipedia.org/wiki/CMOS
@ 2006-11-06T22:54Z
@ 2006-11-07T04:31Z
(pasted from an edit in the article that should have been here in the first place) "anyone got any sources for this? i'm sure modern motherboards still store settings in battery backed ram (i know from having to pull the battery from them when people forget the bios password) the bios itself is in flash though maybe whoever wrote this peice was confusing the bios itself with the bios settings" -- Plugwash
sure you can use the jumper if you have the motherboard manual handy but often you don't. The battery on the other hand is easilly spotted and in my experiance it does reset the settings. do you know of any reliable sources saying that settings are stored in flash? Plugwash 02:32, 17 Apr 2005 (UTC)
THANKS FOR THE INFORMATION PROVIDED ON THE CMOS DEVICES AND THE TECHNOLOGY... I FOUND IT VERY MUCH USEFUL ... ACTUALLY I WAS LOOKING FOR SOME SIMPLE LANGUAGE FORMAT OF THE MATERIAL ON THE INTERNET FOR THE STUDENTS......... IT IS REALLY VERY NICE...........
==5 Nov 2003 (UTC)
Thank you for this information. I am a high tech professional and was looking for a definistion for this word, CMOS. After I did google and glance through a few links, I found this site very useful. Thanks Again!!!
thank you for this information.I am a comp. hardware student and i was seeing this history or definition for this word.CMOS after i did get this term through a few links. i found it now in your site thank you and god bless......
Here's a link i'll bookmark here about CMOS imaging.
I'm no wikipedian (yet...) but it might be a good idea to create a CMOS(image_sensor) thingie? /Erik
I added some info on the recent problems with static power consumption. I wonder if is is too much or too little. There is, of course a lot to be said on the subject. For instance, it is not only sub-threshold leakage, but also effects like gate tunneling and several others. The current way of handling this is to use MTCMOS, Multiple Threshold CMOS. This makes it possible to have transistors with different threshold voltages on the same chip. So we can have both high speed, high leakage gates and low speed, low leakage on the same chip. This has been used all the way back to 0.18 micrometre cell libraries.
I have heard reports of some designs that had a static power consumption of up to 50% of total power.
What do you guys think? How much shuld we write about this?
Where are the Missing HYPENS
CMOS stands for Complementary METAL-OXIDE-SEMICONDUCTOR.
This is NOT the same as Complementary Metal Oxide Semiconductor. The Construction method is A base layer of N-type or P-type Semiconductor material (usually SILICON). An insulating layer of Silicon Dioxide is then deposited on the semiconductor layer. A layer of a metal usually Aluminum or tungsten is then deposited on the metal layer . Regions of both P-Type and N-type semiconductor is then made on the the surface. This creates the necessary complementary transistor junctions needed for the basic GATE package. The use of the three layers of METAL,OXIDE,SEMICONDUCTOR is the derivation of the ACRONYM MOS NOT a mythical not existent Metal Oxide Based Semiconductor material. — Preceding unsigned comment added by 203.87.74.39 ( talk) 23:20, 23 July 2004 (UTC)
Currently, the article is using the phrase "Complementary metal–oxide–semiconductor". Why is this using dashes instead of hyphens? Why is the last term joined together with the others? This seems contrary to MOS:DASH and MOS:HYPHEN. — BarrelProof ( talk) 13:19, 26 April 2019 (UTC)
This article is too technical, and needs to be better organized. Andros 1337 21:32, 8 Jan 2005 (UTC)
Pardon me for saying, but this article has little to no context unless you DO use highly technical terms. Trying to explain it in laymens terms would be like trying to explain vector calculus to someone who knows only basic algebra or microkernel theory to someone who has only programmed in Python; there is no context. You can't expect the article on, say, integrals to be simplified for someone with little exposure to formal mathematics, likewise you can't expect an article about an electrical engineering concept to be simplified for someone with no EE experience or knowledge... I can see a few places where clarity (and certainly organization) can be improved, but it is pretty difficult to explain CMOS in terms everyone can understand. -- uberpenguin 23:00, 2005 Jan 14 (UTC)
The article was not too technical, IMO, but it did need to have additional introductory material at the beginning for those readers wanting just the gist. - R. S. Shaw 04:02, 2005 Jan 21 (UTC)
I am reverting this article to the version prior to Akidd dublin's edits on 2 February. The reason for this is that the material added in the introduction is already covered in the introduction and elsewhere and doesn't really clarify anything in my opinion. Furthermore it really breaks the flow of the article and doesn't fit stylistically with the rest of the content or the general Wikipedia standards. If the user who added these edits still feels they belong, could they please try to reformat them to fit better and post here explaining why they feel these changes are necessary before editing the article again. Thanks! -- uberpenguin 13:13, 2005 Feb 2 (UTC)
being stylistically: digital logic can be tricky. the article needs to be rewritten. "wire" "burn"
my NOTICE shows how the CMOS NOT gate works, and covers the power consumption. capitalization: within programming, listings look very much better, thats all. Akidd_dublin 200502061007 1049
the term MOS is already explained in the MOSFET article. my include would describe the term complementary and also the static nature, power is consumed by electric capacities within the structures. the include would make many lines obsolete: means more than a minor edit. indeed there are actual cpu's which are described as being CMOS, but i would guess their technology is derived from CMOS. sometimes i have read the term static design: the technology is in use for low-power applications. Akidd_dublin 200502070852
the circuits burn power: no charges with different electric potential are equalized.*
charging and discharging: charging contains discharging logically or would charge up forever.
various load capacitances: hhm most people can make the assumption of "various"
gate and wire capacitance: basically these are structures of integrated circuits, but i am not happy with the term wires as such.
(mostly..): electrical capacities within the silicion structure? mostly, but also.., some source..: this can vary due to the layout.
whenever they are switched: logic does not have to be clocked but usually it is.
most circuits are CMOS: as far as i know, there is also LOCMOS, SOS and if you have a mobile phone: it's GaAs technology. i am not an expert, have read PIC references and have build circuits with around twenty chip cases.
about my languages: people have never understood me.
however, i could make up examples. the article should orientate to intel, microchip, motorola documentation style, without words like "some".
probably you know yourself from programming references the feeling of instant understanding. but language does not always model the exact physics model: and its only a model.
Akidd_dublin 200502071756
the
SRAM article is of poor quality. the statement chips would consume around one watt is objection. by the way i know the CMOS cookbook but made the experience that circuits have become obsolete because of PAL/GAL PIC. however, i have found a 4060 in a toaster two years ago, used for timing. this would mean the 4000 CMOS logic product line. phillips is providing detailed information about what ACT and so on means.
perhaps the article should outline the timeline, and the excact terms for current circuits, if you say nearly everything nowadays would be CMOS
Akidd_dublin 200502071820
Is CMOS a special case of MIS ( metal insulator semiconductor)?
-- Abdull 17:48, 18 Jun 2005 (UTC)
I find it confusing when the same word means 2 very different things. In this case, we have:
What can we do to reduce the confusion? Is there 2 other terms (other than "CMOS") that would be more appropriate for these 2 things? -- 68.0.124.33 ( talk) 04:02, 23 August 2008 (UTC)
Is there a better article for all the how-to tips on configuring PCs? It doesn't feel to me as if they belong here; I wouldn't put a set of instructions for my CMOS wristwatch here. Where to put the how-to information? -- Wtshymanski 17:18, 20 Jun 2005 (UTC)
It appears this image has been deleted for some reason. Can someone tell me why? I created that image, and if I need to tag it with some rights release that's no problem.
Iain McClatchie 21:41, 27 July 2005 (UTC)
I found the image very helpful. I hope you can find the time to reupload it. - R. S. Shaw 23:41, 27 July 2005 (UTC)
All right, I'll try to get to it this weekend. This time I'll put in a GFDL tag. Grrr. I definitely didn't see this on my home page or watchlist. Iain McClatchie 22:42, 28 July 2005 (UTC)
These are notes for myself or anyone else who feels like contributing. It seems like a lot of artwork, I guess because hardware design, especially process and layout, is quite visual.
Diagrams of various major process options:
For each of those process options, a series of pictures showing how they get built up would be nice. This is a lot of artwork, but I think it's the best way to convey the information.
I'd also like to see a representation of the scale of modern chips. Perhaps artwork of a transistor (100 nm indicated), then an inverter (1 um indicated), that inverter amidst rows of standard cells (10 um indicated), rows of standard cells in a block (100 um indicated), and a micrograph of a chip or full chip layout (1 mm indicated) with a block labelled. Each pic could have a scale and highlight the component in the previous pic.
And, um, if anyone is going to comment that this material has to be structured, broken into many pages, yes, of course, but first it must be written and drawn, which is a lot harder.
Iain McClatchie 21:30, 30 October 2005 (UTC)
Hi,, Can you please explain if their is a chip call "CMOS RAM"? Or where we can find CMOS chip? is with in ROM chip? pat..
THANK YOU SHADDACK FOR HELP....... pat
Could it be said, that
? -- Arnero 17:33, 27 January 2006 (UTC)
Please answere at TTL
So how do CMOS sensors compare to CCDs? I remember reading somewhere that although the CCDs are harder to manufacter, they are better for image quality; but then, I've also read that CMOS sensors are better in that way. And how do 3CCDs compare to a single CMOS? —The preceding unsigned comment was added by 24.23.6.222 ( talk • contribs) .
In addition to high-k dielectics, another approach to gate leakage reduction is to use a silicon superlattice to enhance drive current whilst siultaneously reducing leakage. This has advantages that it can be incorporated into the production process without costly re-tooling and also superadded onto other techniques such as silicon-on-insulator (SOI), giving additive benefits. See "Addressing Gate leakage with Rerengineered Silicon" (www.reed-electronics.com/semiconductor/article/CA6418540?pubdate=3%2F1%2F2007 Lesterruss 10:55, 25 March 2007 (UTC)
Who invented CMOS technology? -- Abdull 22:00, 30 November 2007 (UTC)
I think that the layout is bad. There are no connection to the polysilicon gates, and the desing won't work. See [1] for a good nand layout. —Preceding unsigned comment added by 200.126.158.167 ( talk) 06:53, 18 September 2008 (UTC)
For CMOS setting - For cange or edit in CMOS features in Computer system.we used two methods 1. Standard settings 2. Advance setting —Preceding unsigned comment added by 122.168.14.35 ( talk) 09:26, 4 January 2009 (UTC)
do they use enhancement or depletion mode mosfets? or both? - Omegatron 02:19, July 11, 2005 (UTC)
-- 68.0.124.33 ( talk) 22:11, 22 August 2008 (UTC) (Edited) -- 68.0.124.33 ( talk) 12:09, 28 June 2011 (UTC)
I have a little problem w/the lack of explanation for the NAND layout. If you look at the polies, below them is diffusion. This makes them depletion-type MOSFETs. Now I realize that by convention when a CMOS layout is drawn a single monolithic diffusion is drawn for both the drain and the source, making channel under the gate by default, and that it's up to the reader to intuitively know that below the poly is really substrate or well. Unfortunately, I didn't know that last week, and had to find my prof before I could understand. I think this should be explained in the article. AngusCA ( talk) 05:42, 15 February 2010 (UTC)
In the image Cmos_impurity_profile.PNG, which shows a cross-section of a chip with a CMOS inverter, aren't the Source and Drain mis-identified in the PMOS transistor? Thank you 69.27.178.6 ( talk) 18:15, 6 February 2009 (UTC)
That badly rated page nicely explains some details of state-of-the-art measures to bring down static power consumption of CMOS circuits. It should be merged into the section on static power on this page.
Additionally, the section on static power here needs a brush up as well. -- Joerg Schreiter
Years later...since this seems to be a specialized topic that may be too technical and specific for a general overview article, I've taken off the merge tags and added a see-also here. -- Wtshymanski ( talk) 22:03, 3 October 2012 (UTC)
Baker is an excellent source for the entire subject of this page. It is cited in connection with its discussion of the original patent, but has a lto more to say (about 1000 pages). Brews ohare ( talk) 14:20, 14 October 2009 (UTC)
I'm not sure, but it seems that first paragraph of article contains sentences it should not contain. It references how wide is CMOS in use. It does not define CMOS by itself.
Article contains repetitive topics, also.
User:Vanished user 8ij3r8jwefi
13:59, 28 November 2009 (UTC)
A sentence in the "Temperature range" section reads "There were theoretical indications as early as August 2008 that silicon CMOS will work down to 40 kelvin, or -243 °C.[2]"
Isn't 40 kelvin -233 °C, not -243 °C? Conversely, wouldn't -243 °C be 30 kelvin?
If anyone has read the cited paper (Edwards C, "Temperature control", Engineering & Technology Magazine 26 July - 8 August 2008, IET), please correct one or the other to make them consistent.
Based on the paragraph alone, 40 kelvin is probably correct and -243 °C is probably erroneous. . . —Preceding unsigned comment added by Needlesslystilted ( talk • contribs) 00:44, 11 January 2010 (UTC)
this section is misleading, as it is describing the characteristics of a CMOS Inverter. A CMOS inverter is one example of a CMOS circuit, but not all CMOS circuits are inverters. For example if you were to say "Output is inversion of input" when talking about a CMOS NAND gate (or indeed anything else besides an inverter) you would be wrong.
The other problem with this section are the first two sentences: "CMOS circuits are constructed so that all PMOS transistors must have either an input from the voltage source or from another PMOS transistor. Similarly, all NMOS transistors must have either an input from ground or from another NMOS transistor." The word input should be replaced by source. Usually (and definitely in this case) one thinks of the gate as the input, not the source. Obviously the author is considering the input to the inverter to be separate from the inputs to the individual transistors, which is confusing and unhelpful in my opinion. —Preceding unsigned comment added by Denki23 ( talk • contribs) 05:56, 11 April 2010 (UTC)
I find it interesting that denki23 would start this discussion as his/her first and so far only contribution to wikipedia. There is another examples of this unusual pattern Talk:Voltage-to-current_converter, also involving edits or desired edits by Circuit dreamer. Is denki23 a sock puppet? The user name doesn't even come up normally and this user may in fact not exist. It sure looks like an amateurish attempt at sock puppetry. Maybe its time for someone to investigate. Zen-in ( talk) 16:04, 11 April 2010 (UTC)
This statement from the "Inversion" section is completely nonsensical:
"CMOS circuits are constructed so that all PMOS transistors must have either an input from the voltage source or from another PMOS transistor."
The original author is trying to make the point that, with pFETs in a static CMOS digital circuit, the drain/source terminals are either connected to a positive voltage (greater than the threshold voltage, VT), or be tied to a node which includes the gate of another MOSFET.
This article is hectic and not well-written. The entire article requires a complete overhaul. For example, the "NAND gate in physical layout" section shows a cross section of the silicon stack itself, but there is no gate. There's just two, disjoined transistors. The diagram of the NAND gate's top-level layout doesn't include the layer for a p-well or n-well. Further, I believe that the article should be split in to two: CMOS-as-a-process-technology, and CMOS-as-a-circuit-technology.
I know that Wikipedia has a tag to indicate that an article requires a re-write, but I can find no policy on when a re-write is justified or allowed. I'd really like to fix this article, but I realize that it will require a lot more than some strategically-placed bandages. Can anyone tell me where I should be directing my efforts in requesting an article re-write? —Preceding unsigned comment added by Cinnanom ( talk • contribs) 14:48, 28 August 2010 (UTC)
I don't think this is a very nice article on CMOS. At a minimum, there should be a reference to the 5400 family and a schematic of a NOR so it can be visually compared to a NAND. The inverter's image is repeated twice in the article. This article does not show good substance. Here are some additional comments.
1. The sentence "There are small reverse leakage currents which is formed due to formation of reverse biased between diffusion regions and wells." needs fixing.
2. The sentence "In modern process diode leakage is very small compared to sub threshold and tunnelling currents, so these may be neglected during power calculations." needs corrections.
3. "1.d. Contention current in ratioed circuit" is an incomplete section and it needs expanding.
4. I made several corrections in the "Power: switching and leakage". For some reason, lots of words were capitalized. There were also plenty of misspellings so I assume the section is relatively new.
ICE77 ( talk) 01:08, 22 February 2011 (UTC)
I am already fixing lots of spelling, grammar and punctuation errors for many articles. I have no intention to assume ideas a writer was intending to convey or expand a section that should have been completed by somebody in the first place. I list the things I see that need work and if somebody has more time than me to add, he/she is welcome to add.
ICE77 ( talk) 04:01, 26 February 2011 (UTC)
The most of data signals usually have very low activity factors (0-0.2), except maybe for domino logic (which is used rarely today). I fixed "0.5" used in the article by 0.1 and added link to the paper in which there is a distribution of % of signals vs. their activity factor. In general, I think the "activity factor" is not explained well in the article, in my opinion it should be added as an independent article in Wikipedia (working on it...) Mkostya ( talk) 18:23, 18 August 2012 (UTC)
Some people correctly point out that pass transistor logic and dynamic logic (digital electronics) don't seem to match the description at CMOS#Duality. So when they see circuits in those and other logic family#On-chip design styles, they ask "why is this ... considered a CMOS circuit?" ( Talk:XOR gate#Why is that CMOS?)
My understanding is that there is a very specific logic family F that does match the description at CMOS#Duality. My understanding is that there is a more general category C of circuits constructed from both nFET and pFET transistors that includes many logic families, including F, pass transistor logic, and dynamic logic. The ambiguity arises because most people talking about F call it "CMOS", and most people talking about C call that "CMOS".
There are many other cases where people use the same word to refer to some general category C in one sentence, and the same word to refer to some specific case F in another sentence -- genericized trademark, metonymy, etc. Is there some more specific terms we could at least mention in this article, one term that unambiguously refers to F and a different term that unambiguously refers to C? -- DavidCary ( talk) 01:57, 16 October 2015 (UTC)
"high Vth transistors are used when switching speed is very important, while low Vth transistors are used in speed sensitive paths" doesn't read properly for me. Missing the word "less", perhaps? Sorry if I'm using the wrong approach to flag the issue -- I'm NOT an experienced contributer! Cabbageears ( talk) 01:37, 17 October 2015 (UTC)
The denser VLSI processors 14 nm, 10 nm, Intel's 22 nm etc seem to all use FinFET to achieve the high densities (and low power). Could mention here. Maybe need a clearer separation of CMOS logic from CMOS technology processes ? - Rod57 ( talk) 10:23, 23 June 2017 (UTC)
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Under Technical details is it ok to say that other materials can be used apart from silicon. eg Germanium [3] for research. Does GaN enhancement mode transistors [4] mean GaN could be used for CMOS? If not, what else is needed ? - Rod57 ( talk) 13:32, 28 May 2018 (UTC)
"CMOS technology was initially overlooked by the American semiconductor industry in favour of NMOS" ... is the reason given correct? (NMOS was more powerful) Wasn't CMOS more complicated to fabricate vs NMOS? More layers? NMOS allowed more transistors per die?