From Wikipedia, the free encyclopedia
Ricoh 5A22
Ricoh 5A22-02
General information
Designed byRicoh
Performance
Max. CPU clock rate1.79 MHz  to 3.58 MHz 
Data width8-bit
Address width24-bit

The Ricoh 5A22 is an 8/16-bit microprocessor produced by Ricoh for the Super Nintendo Entertainment System (SNES) video game console. It is based on the 8/16-bit WDC 65C816, which was developed between 1982 and 1984 for the Apple IIGS personal computer. It has 92 instructions, an 8-bit data bus, a 16-bit accumulator, and a 24-bit address bus. The CPU runs between 1.79 MHz and 3.58 MHz, and uses an extended MOS Technology 6502 instruction set.

Major features

In addition to the 65C816 CPU core, the 5A22 contains support hardware, including:

Performance

The CPU as a whole employs a variable-speed system bus, with bus access times determined by the memory location accessed. The bus runs at 3.58 MHz for non-access cycles and when accessing Bus B and most internal registers, and either 2.68 or 3.58 MHz when accessing Bus A. It runs at 1.79 MHz only when accessing the controller port serial-access registers. [1] It works at approximately 1.5 MIPS, and has a theoretical peak performance of 1.79 million 16-bit operations per second.

See also

References

  1. ^ anomie (December 21, 2008). "Anomie's SNES Memory Mapping Doc" (text). Retrieved April 24, 2022.
From Wikipedia, the free encyclopedia
Ricoh 5A22
Ricoh 5A22-02
General information
Designed byRicoh
Performance
Max. CPU clock rate1.79 MHz  to 3.58 MHz 
Data width8-bit
Address width24-bit

The Ricoh 5A22 is an 8/16-bit microprocessor produced by Ricoh for the Super Nintendo Entertainment System (SNES) video game console. It is based on the 8/16-bit WDC 65C816, which was developed between 1982 and 1984 for the Apple IIGS personal computer. It has 92 instructions, an 8-bit data bus, a 16-bit accumulator, and a 24-bit address bus. The CPU runs between 1.79 MHz and 3.58 MHz, and uses an extended MOS Technology 6502 instruction set.

Major features

In addition to the 65C816 CPU core, the 5A22 contains support hardware, including:

Performance

The CPU as a whole employs a variable-speed system bus, with bus access times determined by the memory location accessed. The bus runs at 3.58 MHz for non-access cycles and when accessing Bus B and most internal registers, and either 2.68 or 3.58 MHz when accessing Bus A. It runs at 1.79 MHz only when accessing the controller port serial-access registers. [1] It works at approximately 1.5 MIPS, and has a theoretical peak performance of 1.79 million 16-bit operations per second.

See also

References

  1. ^ anomie (December 21, 2008). "Anomie's SNES Memory Mapping Doc" (text). Retrieved April 24, 2022.

Videos

Youtube | Vimeo | Bing

Websites

Google | Yahoo | Bing

Encyclopedia

Google | Yahoo | Bing

Facebook